The Asian subcontractor Pac Tech Asia for Bumping and Wafer Level Packaging facility has qualified a volume process for Power MOSFET devices. It offers a unique turnkey solution for both frontside and backside metallization on the wafers. The wafer frontside metallization is based on the proven Electroless NiAu and NiPdAu process of the company, providing low cost maskless capacity of 600,000 wafers per year. Concurrently, the company has qualified a highly reliable and well-controlled Backside Metallization process with TiNiAg evaporation.
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