In good and bad times device manufacturers need to continually cut costs to maintain profitability and stay ahead in the market place. Offering devices manufactured in higher integrations by shrink process and combining functionalities, costs are reduced and value added. Further reducing test costs, challenges to implement multi site test and to handle these intricate devices need to be addressed.
Bernd Niess, Advantest Europe, Munich
Being under constant competitive pricing pressure, semiconductor companies need to cut costs. As test complexity and test coverage requirements have increased, methods such as DFT/ BIST have been developed. Unfortunately the scope of these methods is limited. Consequently significant test cost reductions can often only be achieved by implementing higher parallel test counts.
High parallel handler
The SOC handler M4841 from Advantest is conceived to handle beyond today’s production test needs. Designed as a modularized tri-temp chamber handler, there is no customization needed to handle mainstream devices like BGA, CSP, QFP, SOP, PGA, down to package sizes of 3×3 mm. The handler supports a maximum of 16 devices in parallel, and offers a high throughput of up to 18500 devices per hour. Flexibly dual, quad and octal site handling are supported while offering high throughput due to the handler’s unique pick and place mechanism. Consumer products need to function in a wide range of environments and automotive devices in particular can be exposed to a wide range of temperatures. The handler supports temperature ranges from –55 to +155° C with a tight guaranteed temperature accuracy. Fragile CSP packages are protected from damage during pickup by the patented “Soft Touch Handling” concept, a motion controlled handling method which reduces the dynamic device impact significantly. For further production efficiency and stability, the system offers complementary functionalities to protect the device under test and ensure testing stability and optimize yields: Ionizers with closed-loop controllers to eliminate electro static charge building up, automatic socket cleaning function to remove residue from the socket pins and device brushing to remove left over residue from the manufacturing process and generate electrical contact failures. The handler is designed for simple operation via an intuitive GUI and a state of the art touch screen which can be customized according to actual user needs. The software contains a comprehensive online assistance support that offers operators easy to follow visual guides.
High pin count test
The number of signal pins increases leading to larger package sizes in particular complex multimedia-devices while highly integrated micro-processor designs are expected to become more and more common in future. In some cases packages of such devices can reach 2000 to 3000 contacts, resulting in relative large device sizes up to 55mm x 55 mm. Usually when contacting devices a maximum contact force of 30 to 40 kgf is required from handling equipment. As the contact force for larger devices increases to 100 kgf and beyond, a strong and a mechanically stable design is mandatory to reliably contact over 2000 pin devices and achieve multi site test. The handler can contact devices exerting a force of 102 kgf per device, providing a reliable solution for this extreme challenge. The mainframe with vertical contacting features, an exclusive contact head with an electro-pneumatic balancing contact in combination with the strong, FEM tuned mainframe, guarantees reliable contact and high repeatability. High pin count devices typically consume high power leading to high heat dissipation during testing which can destabilize the thermal environment and affect test coverage. The issue is resolved by offering controlled ambient operation without the need for liquid nitrogen. This allows production managers flexible test floor planning, as handler operation without a liquid nitrogen source is possible. The innovative handling system responds to the rapidly changing demands and is offered as stand- alone system and with the T2000 tester series.
EPPE 465
zusammenfassung
Systeme sollten den Anforderungen von heute und morgen gerecht werden, um wettbewerbsfähig zu bleiben. So der Testhandler M4841, welcher mit dem Testsystem T2000 einen parallelen Test von 16 SoC-Bauteilen ermöglicht..
Pour rester compétitifs, les systèmes doivent répondre aux exigences actuelles et anticiper celles de demain. Ainsi, L’analyseur M4841 réalise un essai en parallèle avec le système T2000 sur 16 composants d’un système mono-puce comportant de nombreuses bornes.
Ñèñòåìû äîëæíû îòâå÷àòü òðåáîâàíèÿì íàñòîÿùåãî è áóäóùåãî, ÷òîáû ñîõðàíèòü êîíêóðåíòîñïîñîáíîñòü. Òàêèì îáðàçîì, òåñòîâûé ìîäóëü M4841, ïîçâîëÿþùèé, ñîâìåñòíî ñ òåñòîâîé ñèñòåìîé T2000, ïðîèçâîäèòü ïàðàëëåëüíûé òåñò 16 óçëîâ SoC ñ áîëüøèì êîëè÷åñòâîì ïèíîâ, ãîòîâ ê íîâûì òðåáîâàíèÿì.
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