The production costs of complex SoC semiconductor devices have fallen continually over recent years due to improvements in the manufacturing process and an ever increasing integration density. However, the cost ratio for chip testing has remained stubbornly high. The prime reason for this can be attributed to the usage of outdated ATE (Automated Test Equipment) instrumentation and restrictive system architectures. While it has been possible to significantly cut the costs of chip production by means of innovative developments, the cost reductions achieved for test has been comparatively slight.
Hans Giessibl & Stefan Gasteiger, Advantest Europe, München (Germany)
The T2000 test system for mixed signal and system-on-chip devices developed by Advantest represents a new design development, and is a highly flexible tester platform with different scalable expansion levels. The system platform features different test heads with a varying number of slots 26 or 52, all slots are universal and can be equipped with all available instruments. This allows for particularly high economic effectiveness in conjunction with the lowest possible costs for respective test assignments. Not only this, but the applications are also upward compatible, i.e. 26 slot applications can be used on the 52 slot test head. The test system incorporates an ingenious multi-controller concept, with which a system computer shares the workload with one or more test controllers in order to achieve the highest possible throughput rate. It can be flexibly configured with a whole range of test instruments, such as pin electronics, generators/samplers and current/voltage sources, in conjunction with variable scaling of the basic system. Digital, high-speed interface, audio & video, RF and analogue components are already perfectly covered by the currently available instrumentation. The range of instruments is being continually expanded. 2010 will see the introduction of instruments and software for mixed signal and automotive applications that are being developed in Europe.
Programming & software environment
The software environment for T2000 is based on Microsoft Windows, while the flexible and user-friendly high level language OTPL is available for the programming interface. Numerous libraries and test program templates (test classes) can be used to quickly and easily start the system. The user can utilise these test classes with a C++ interface in line with the specific requirements, or develop them himself for extended developments. The company provides an integrated design and test environment, which allows for a significant reduction in the time spent on processes from the development through to product maturity. This STIL-based solution features bidirectional EDA tools for automatically generating tests. This solution from Advantest, unique in the ATE industry, supports both the IEEE STIL 1450.2 standard as well as the preceding versions 1450.0 and 1450.1. The STIL interface incorporates a STIL reader that automatically generates test programs from an ATPG STIL file, together with a STIL writer for automatically creating STIL files and signal specifications from a test program. These tools form a closely knit and effective interface between the ATE system and the EDA. This fulfils the SoC testing specifications necessary for generating complex and long function patterns and quickly and promptly launching products onto the market with a short shelf life.
The entire development environment is also on offer together with all the available tools in a compatible offline version, thus allowing test programs to be developed independently of the test system. The design of the adapter for the test object (performance board) must also be taken into consideration when optimising the throughput rate. The performance board must be adequately proportioned in order to accommodate any application-specific wiring that may be required. These space requirements are particularly critical when testing mixed signal SoCs in conjunction with the so-called multi-site test aimed at the parallel testing of as many devices as possible. Examples of this are the solutions recently developed for the 16-fold parallel testing of RF cell phone chips. The T2000 platform concept allows applications from the „small“ engineering system to be used, for instance, directly on the „large“ production system.
Optimised throughput rate
A distributed system controller concept forms the basis for economically efficient parallel test.
A higher throughput rate for the parallel testing of modules can also be achieved by utilising a larger number of tester controllers running the test program. Such a so-called multi-controller architecture additionally allows several test program developers to verify the programs at the same time during the development phase, which in turn enables chip manufacturers to lower their development costs. This new system architecture utilises optical data wiring in conjunction with other key functions. This makes it easier and cheaper to upgrade or convert an existing test system than to invest in a completely new system. Longer test program execution times have a significant impact on the test costs. For instance, some SoC modules undergo several thousand measurements, during which, for example, a particular voltage level or frequency signal must stabilise itself for each test. Intensive commitment to development has led to a drastic cut in long stabilising times for analogue signals by means of new technologies.
The test platform is a flexible and scalable test solution for the entire spectrum of com-plex mixed signal and SoC modules. Depen-dent upon the expansion level and configuration, the system can be economically deployed for mass production, as well as for engineering systems at the semiconductor manufacturer or test suppliers. The instrumentation that is already available for digital, RF and high-speed digital testing will shortly be extended with new instruments with a hitherto unknown functional density for automotive and power management solutions. Advantest thus provides an efficient test system platform that goes a long way toward helping semi- conductor manufacturers to lower test costs, as well as offering a secure investment for the future.
ZUSAMMENFASSUNG
Oft ist es erst die Kombination von Teststrategien, die optimale Testabdeckung bei niedrigen Kosten ermöglicht. Die T2000-SoC-Testplattform von Advantest deckt verschiedenste Teststrategien ab und adressiert u.a. Bausteine wie Mikrocontroller, Mikroprozessoren, Draht- und drahtlose Kommunikation oder Automotive.
Souvent, c’est la combinaison de stratégies de test qui apporte vraiment une couverture optimale à coûts réduits. La plateforme de test Soc T2000 Advantest couvre les stratégies d’essai les plus variés et prend notamment en charge des composants tels que les microcontrôleurs, les microprocesseurs, la communication filaire et sans fil, les équipements automobiles et les systèmes récréatifs.
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