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    Modular, compact and optimally scalable semiconductor tester platform
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    Products

    Modular, compact and optimally scalable semiconductor tester platform

    The compact and scalable tester platform Aspect idMOD, for which sales and application support is provided by the Munich-based test specialist ATEip,
    Veröffentlicht
    03. November 2011
    Lesezeit
    4 Minuten
    Rubrik
    Products

    The concept of this tester platform can be brought down to a common denominator: pushing aside the expensive and cumbersome behemoth testers, which also consume a lot of space on the shop floor, and instead using small, flexible and modular, configurable systems which can remarkably reduce the test costs per item and require only a minimum footprint. This type of machine concept provides for a utilization ratio and also for efficient employment of the capital investment, and in such a way as to achieve the very low test costs required. The platform’s modular and extremely small pin and test electronics can be attached directly to the device under test (DUT), to the load board, test head or be incorporated into test handler mechanics. Because of the short distance between the test electronics and the DUTs the signal distortions are significantly reduced, the test and measurement quality raised, and the test throughput maximized. The realized modularization of the test platform also means that it is completely scalable in two respects: in its functionality and in the pin count. Therefore, virtually all kinds of semiconductor test systems can be created for a wide range of possible solutions. In its most basic version, this type of test system consists of just a single-slot Compact Test Unit featuring 64 single-ended I/Os which can be addressed by the proprietary idFLEX system bus, whereby the switching time from one channel to the other is defined within 1 ms. In this very small test unit there are also integrated a 12 bit AD/DA converter, and a decade resistor for values from 1 to 100 kOhm, available in 100 steps. When more test resources are needed board-based instruments can be added using the idFlex bus. Such a single-test-site solution can be packed in a really compact housing measuring just a few more millimeters than the 50 x 50 mm of the basic unit board. For greater functionality and pin count the required single-slot modules can be added by serial apposition. But this is just one aspect of the equipment’s versatility; the other is characterized by the configuring of multi-site test systems with up to thousands of test channels for maximum throughput in high-volume production environments. Besides the virtually unlimited addition of test channels, there are FPGAs control modules available, LVDS interfaces, special converter cards and signal conditioning units. For this, the system integrator or test engineer has access to even more instruments within the idMOD/idFLEX unit portfolio. Depending on their functionality and performance the instruments are integrated in 2-, 4– or 8-slot PCB cards. This makes it possible to fit the system hardware initially into a Stack Unit with dimensions of just 50 x 50 x 120 mm. And if even more functions and pin count are needed, such Stack Units can be linked together practically in any number and placed near the DUT. In an ATE system like this, the test signals are internally transferred in real-time with the high speed of 10 GHz by direct RAM access. Taking into account the high versatility for the configuration of semiconductor testers, systems in quite different form factors can be integrated and also in various technical designs, fulfilling all the diverse requirements of the users. On the software side the idMOD system comes with quite a useful collection of programs and functions. First of all, the configuration of a test system is described using the standard VHDL. Then, the test program can be generated consisting of numerous single test routines that are triggered and executed by the program control during the test process. The central FPGA modules can also be programmed using the procedure according to JTAG/IEEE standard 1149.1. So there are many ways to efficiently generate test programs with standard tools.

    productronica, A1.534

    www.ATEip.de

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