Chiplets deconstruct SOCs into their composite parts, creating smaller chips that can then be packaged together to operate as a single system, to provide potential benefits that can include improved energy efficiency, faster system development cycle time, and reduced costs. However, packaging advances are needed to move chiplets from research to mass production more quickly and efficiently, driven by the rapid pace of innovation in AI computing.
This latest agreement builds on an existing collaboration between the companies resulting last year in the debut of a new hybrid bonding approach that optimizes bonding quality between two chiplets. Now, they will continue to work together on the development of bonding technologies for chiplet packages.
“IBM has been at the forefront of developing advanced packaging technology for the age of AI,” said Huiming Bu, Vice President of IBM Semiconductors Global R&D and Albany Operations, IBM Research. “We are proud to continue our work with ASMPT to advance chiplet packaging technology to pave the way for smaller, more powerful, and more energy efficient chips.”
“We are excited to build on our strong relationship with IBM to drive the frontiers of Advanced Packaging in tandem with accelerating innovations in artificial intelligence,” said Lim Choon Khoon, Senior Vice President, ASMPT. “We are pleased to work with IBM to advance next generation packaging and Heterogeneous Integration solutions for the AI era.”
