Zum Inhalt springen
EPP Europe
  • News
  • Products
  • Applications
  • Technology
  • Semiconductor
  • Inspection
  • Company News
  • Events
EPP Europe
  • Technology
  • Inspection (AOI/AXI)
  • Semiconductor Packaging
  • Company News
  • Products
  • Trade Shows & Events
    EPP Europe Newsletter
    The most important electronics-manufacturing news delivered to your inbox.

    Info

    • Impressum
    • Datenschutz
    • Barrierefreiheit
    • Datenschutzeinstellungen

    Kontakt zur Redaktion

    EPP EuropeKonradin Mediengruppe
    Ernst-Mey-Str. 8, 70771 Leinfelden-Echterdingen

    E-Mail: redaktion@konradin.de
    Folgen Sie uns
    EPP Europe
    © 2026 EPP Europe
    Startseite/Semiconductor-packaging/Artikel
    Worldwide silicon wafer shipments and revenue fall in 2023, SEMI reports
    Bildquelle nicht angegeben
    Semiconductor-packaging

    Worldwide silicon wafer shipments and revenue fall in 2023, SEMI reports

    Worldwide silicon wafer shipments in 2023 decreased 14.3% to 12,602 million square inches while wafer revenue contracted 10.9% to USD 12.3 billion (EUR
    Veröffentlicht
    16. Februar 2024
    Lesezeit
    1 Minute
    Rubrik
    Semiconductor-packaging

    The decline, a sharp departure from the previous three years of consecutive growth, stemmed from a slowdown in end-demand, coupled with a broad-based inventory correction. Softening memory and logic sector demand led to a decline in orders for 12-inch wafers, while weakening foundry and analog uptake accounted for a drop in shipments of 8-inch wafers.

    “Shipments of 12-inch polished and epi wafers contracted 13% and 5% in 2023, respectively,” said Lee Chungwei, Chairman of SEMI SMG and Vice President and Chief Auditor at GlobalWafers. “Total shipments of all wafer sizes slipped 9% in the second half of 2023 relative to the first half of the year.”

    Silicon wafers are the fundamental building material for the majority of semiconductors, which are vital components of all electronic devices. The highly engineered thin disks are produced in diameters of up to 12 inches and serve as the substrate material on which most semiconductors are fabricated.

    Mehr aus Semiconductor-packaging

    Weitere aktuelle Artikel aus der Rubrik Semiconductor-packaging.

    Alle Semiconductor-packaging-Artikel
    Nanoscribe Expands Photoresin Portfolio for Micro-Optics Fabrication via Two-Photon PolymerizationFoto: Brecht Corbeel / Unsplash
    Semiconductor-packaging

    Nanoscribe Expands Photoresin Portfolio for Micro-Optics Fabrication via Two-Photon Polymerization

    11. November 2026

    Nanoscribe has detailed its range of photoresins engineered for Two-Photon Polymerization (2PP) and Two-Photon Grayscale Lithography (2GL), targeting high-precision micro-optics manufacturing on silicon, glass, and…

    Canon Launches FPA-6400ES6a KrF Lithography System with 400 Wafers-per-Hour ThroughputFoto: Canon Europe (semicon)
    Semiconductor-packaging

    Canon Launches FPA-6400ES6a KrF Lithography System with 400 Wafers-per-Hour Throughput

    10. November 2026

    Canon has announced the FPA-6400ES6a KrF scanner for semiconductor lithography, combining a throughput of 400 wafers per hour with industry-leading overlay accuracy of 4.0 nm and the ability to handle wafer warpage of…

    Fabmatics absorbs SCI business activities under unified brandFoto: Ludovico Ceroseis / Unsplash
    Semiconductor-packaging

    Fabmatics absorbs SCI business activities under unified brand

    6. November 2026

    Fabmatics has integrated the business activities of SCI under the Fabmatics brand, consolidating the acquired expertise within its semiconductor automation portfolio.

    Entegris and Kioxia Expand Partnership on Materials Innovation for Next-Gen 3D Flash MemoryFoto: Louis Reed / Unsplash
    Semiconductor-packaging

    Entegris and Kioxia Expand Partnership on Materials Innovation for Next-Gen 3D Flash Memory

    6. November 2026

    Entegris and Kioxia are deepening their strategic partnership to co-develop materials and process technologies for future BiCS FLASH 3D NAND architectures, using AI, digital-twin modelling and experimental validation at…

    ← Zurück zu Semiconductor-packagingZur Startseite