Zum Inhalt springen
EPP Europe
  • News
  • Products
  • Applications
  • Technology
  • Semiconductor
  • Inspection
  • Company News
  • Events
EPP Europe
  • Technology
  • Inspection (AOI/AXI)
  • Semiconductor Packaging
  • Company News
  • Products
  • Trade Shows & Events
    EPP Europe Newsletter
    The most important electronics-manufacturing news delivered to your inbox.

    Info

    • Impressum
    • Datenschutz
    • Barrierefreiheit
    • Datenschutzeinstellungen

    Kontakt zur Redaktion

    EPP EuropeKonradin Mediengruppe
    Ernst-Mey-Str. 8, 70771 Leinfelden-Echterdingen

    E-Mail: redaktion@konradin.de
    Folgen Sie uns
    EPP Europe
    © 2026 EPP Europe
    Startseite/Semiconductor-packaging/Artikel
    Plasma surface treatment in semiconductor manufacturing – selective, inline, and cycle-time optimized
    Bildquelle nicht angegeben
    Semiconductor-packaging

    Plasma surface treatment in semiconductor manufacturing – selective, inline, and cycle-time optimized

    Plasmatreat faced up to the increased challenges and developed a fully automated inline system for selective pretreatment with Openair-Plasma.
    Veröffentlicht
    22. März 2022
    Lesezeit
    3 Minuten
    Rubrik
    Semiconductor-packaging

    Semiconductors are in short supply right now and demand is showing no signs of easing off. With this in mind, increasing throughput is just as important as increasing yield to deliver a high quality product. In its capacity as a long-standing and experienced supplier, the technology leader Plasmatreat GmbH from Steinhagen, Germany, has therefore faced up to the increased challenges and developed a fully automated inline system for selective pretreatment with Openair-Plasma that is designed according to market requirements. In doing so, customers benefit from a flexible, potential-free, high-speed treatment.

    Vacuum plasma has been used for many applications in the semiconductor industry over the years. The Openair-Plasma process from Plasmatreat, on the other hand, facilitates a fast, inline process for pretreatment under atmospheric conditions that is suitable for surface treatments such as microfine cleaning, activation, and plasma coating. This technology can be used in a variety of ways in the field of semiconductor manufacturing – for example, it enables microfine cleaning in the packaging processes, thereby replacing the vacuum chamber in the production of chip packaging in an efficient and cost-effective manner.

    Other areas of application include wire and die bonding, thermal compress bonding, and pre-molding. “As an established system supplier, we accepted a request from a long-standing customer to develop a special system for them, which is called a Plasma Treatment Unit (PTU). In order to adhere to the customer’s speed specifications, we worked with a dual-lane concept for this PTU, which allows us to treat components in parallel on two conveyor belts within a single system. This PTU can selectively pre-treat JEDEC trays handling 8 to 128 components on defined depositing devices, for the subsequent thermal compress bonding process and is designed for maximum throughput,” explains Nico Coenen, Market Segment Manager Electronics at Plasmatreat, with regard to the key challenges.

    Comprehensive options
    The PTU, which is designed for the specific process engineering sequence of semiconductor manufacturing, can be seamlessly integrated into production lines. It offers various kinematics and automation options, such as precise-fit handling of assemblies and components, and allows efficient surface treatment. “Since we already produce fully automated systems for other industries, we already had the internal design and automation expertise required to develop and implement this customer system,” elaborates Nico Coenen.

    “In order to develop an inline-capable system for the semiconductor industry and be able to guarantee the highest possible cycle times, we had to take several process steps into account and implement these with precision as early as the conception phase,” stresses Coenen. For example, Plasmatreat developed the dual-lane concept specifically for high-speed treatment of up to 1.5 m/s. The dual-lane-concept is essentially suitable for various applications, with the system designed for both JEDEC trays and lead frames. It has different processing concepts according to the cycle time, and communication within the production line takes place via the standard equipment interface protocol interface in the semiconductor industry, SECS/GEM.

    With regard to the work steps, these are all recorded in the PTU and the traceability of the treatment is ensured by reading barcodes on the chips. One of the many benefits of this is that it records where exactly the individual components were selectively treated and whether, for example, only the top of a component was treated with plasma. Furthermore, the testing capacities at the Steinhagen site were expanded and a Class 6 clean room was set up for this special project and others.

    Mehr aus Semiconductor-packaging

    Weitere aktuelle Artikel aus der Rubrik Semiconductor-packaging.

    Alle Semiconductor-packaging-Artikel
    Nanoscribe Expands Photoresin Portfolio for Micro-Optics Fabrication via Two-Photon PolymerizationFoto: Brecht Corbeel / Unsplash
    Semiconductor-packaging

    Nanoscribe Expands Photoresin Portfolio for Micro-Optics Fabrication via Two-Photon Polymerization

    11. November 2026

    Nanoscribe has detailed its range of photoresins engineered for Two-Photon Polymerization (2PP) and Two-Photon Grayscale Lithography (2GL), targeting high-precision micro-optics manufacturing on silicon, glass, and…

    Canon Launches FPA-6400ES6a KrF Lithography System with 400 Wafers-per-Hour ThroughputFoto: Canon Europe (semicon)
    Semiconductor-packaging

    Canon Launches FPA-6400ES6a KrF Lithography System with 400 Wafers-per-Hour Throughput

    10. November 2026

    Canon has announced the FPA-6400ES6a KrF scanner for semiconductor lithography, combining a throughput of 400 wafers per hour with industry-leading overlay accuracy of 4.0 nm and the ability to handle wafer warpage of…

    Fabmatics absorbs SCI business activities under unified brandFoto: Ludovico Ceroseis / Unsplash
    Semiconductor-packaging

    Fabmatics absorbs SCI business activities under unified brand

    6. November 2026

    Fabmatics has integrated the business activities of SCI under the Fabmatics brand, consolidating the acquired expertise within its semiconductor automation portfolio.

    Entegris and Kioxia Expand Partnership on Materials Innovation for Next-Gen 3D Flash MemoryFoto: Louis Reed / Unsplash
    Semiconductor-packaging

    Entegris and Kioxia Expand Partnership on Materials Innovation for Next-Gen 3D Flash Memory

    6. November 2026

    Entegris and Kioxia are deepening their strategic partnership to co-develop materials and process technologies for future BiCS FLASH 3D NAND architectures, using AI, digital-twin modelling and experimental validation at…

    ← Zurück zu Semiconductor-packagingZur Startseite