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    New panel-level packaging solution increases yields
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    News

    New panel-level packaging solution increases yields

    A leading electronics manufacturing company has developed several solutions for panel-level packaging (PLP) during semiconductor manufacturing. In one
    Veröffentlicht
    26. Juni 2025
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    1 Minute
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    The company, Nordson Electronics Solutions, worked with PTI to set up a comprehensive PLP demonstration. It achieved high-quality, void-free underfill results at scale using the ASYMTEK Vantage Series fluid dispensing system, equipped with the ASYMTEK IntelliJet Jetting system. The precision technology mitigated warpage and optimized fluid flow while decreasing cycle time by almost 30%.

    PLP offers a path to managing the complexity of larger die sizes and higher-density designs while maintaining manufacturability and cost efficiency as the semiconductor industry transitions from 300-mm wafers to panels. PTI is enabling PLP applications that are designed to meet the semiconductor industry’s growing demands to serve AI, high-performance computing, and chiplet-based architectures. Underfill has been pivotal in semiconductor packaging since the adoption of flip-chips in the 1990s. As applications have become more demanding, particularly in high-performance CPUs, GPUs, and advanced architectures like flip-chip and 2.5D/3D ICs, the importance of underfilling to enhance mechanical reliability and thermal performance has grown. As the industry has evolved from PC board to substrate, wafer, and now panel applications, Nordson has responded by developing innovations for underfill processes.

    www.nordson.com

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