This is especially true when looking at the rapid development trends of current flip-chip technologies, considering that the expansion of flip chip with traditional C4 interconnect is showing signs of reaching its limits. As always in transitory times, this creates a surge of new technologies awaiting their test in the field followed by their timely introduction. Case in point: alternative bumping technologies, including copper pillar, are starting to show up in various different applications – besides totally new approaches such as Infineon’s embedded wafer-level ball technology.
Overcoming the pitch limitations of the traditional C4 process, amongst a host of other considerations, is currently driving the advancement of flip-chip processes based on Au stud or copper pillar bumps. Today’s packaging roadmaps are calling for pitches as low as 30μm. Such fine pitch requirements, together with the missing self-centering effect of C4 bumping, require a placement accuracy of 7μm/3sigma – if not lower.
3D integration is another driver towards higher placement accuracies. When memory, logic and other functionalities are integrated in one chip, the common 3D approach today is to stack those systems on top of each other, thereby forming a heterogeneous integrated package.
Yet this well known 3D approach necessitates high-density system interconnections. Thus, a very fine pitched interconnect method is required. Needless to say: such fine-pitched interconnections need high placement accuracy for stacking these systems on top of each other.
This is where Datacon comes in. „As a leading world market supplier of advanced packaging equipment we realize the demand for a new and stable solution in regard to accuracy and pitch in connection with copper-pillar processes,“ says Manfred Glantschnig, Datacon Product Manager Diebonding. „We are currently working full force on various roadmapping and development projects to further enhance the placement accuracy of our 8800 platform.“ Most important: Datacon will make these new solutions retrofittable on existing systems at the customers’ premises.
To further these wide-ranging objectives, a major R&D project has been launched at Datacon to develop future ultra precise Flip Chip Bonders for fine pitch interconnects as well as chip-to-wafer (C2W) stacking processes and tools. With this capital-, and labor-intensive research project Besi/Datacon is aiming at low-cost, mass-produced 3D ICs with chip-to-wafer stacking at an, up-to-now unheard of, accuracy of 2.5µm at 3 Sigma. Many familiar process steps such as optical inspection, wafer feeding and transportation routines should be done away with once this project reaches the commercial arena, to be expected around 2012. Datacon is working hard on the first piece of the action, an ultra-precise flip-chip bonder based on the 8800 FC Quantum platform. A prototype is envisioned by the end of this year.
„In parallel to our general roadmap, which mainly focuses on regularly improving the accuracy of the overall 8800 platform,“ says Harald Meixner, Product Specialist, at Datacon Technology GmbH, „we are currently concentrating our efforts on instant solutions for urgent customer needs.“ These needs are primarily relating to engineering patches to evaluate the stability of those new processes.
„In order to early set the trend and robustly handle the upcoming challenging applications,“ says Meixner, „we have decided on certain changes of the standard 8800 platforms must be done.“ Again, the primary goal is to be able to integrate these changes in machines already delivered to customers and do the modifications towards higher accuracy and smaller pitch – without any losses in processing speed. Retrofitting, Meixner says, will be quick and simple, requiring new parts and process evaluation carried out by a Datacon technician right on the customers’ premises.
The new 8800 and 2200 upgrade packages as devised by Datacon include changes to the platforms’ hardware setup such as the uplooking camera that inspects the chip immediately before placing. The new setup employs a camera with doubled enlargement factor to accommodate fine-pitched components.
Also, there are additional hardware components provided such as a second target object, which enables the increased accuracy of the machine. Of course, the additional target object necessitates a new software background with improved calibration methods and software algorithms.
Another aspect of the new high-accuracy/smaller pitch solution is the separation of placement and soldering. With current setups, placing and soldering takes up at least 10 to 20 seconds per component. The new setup does only the placement. Soldering is done, as batch, in a separate Reflow oven. „This,“ says Harald Meixner, „is a much better solution in regard to process speed.“
As the figures clearly demonstrate, the key factor to make a challenging flip-chip process work is accuracy and stability. „The application we have set up and tested in our application lab pertains to an organic strip substrate,“ says Meixner. Without giving away too much about the customer and specific solution, the components (8mm x 8mm) are mounted on a wafer; they are 100μm thick. „The required flux is applied to the bumps using a 25μm cavity in our standard slide fluxer system.“ There was no need for any special customized tooling to handle the devices on the 8800 platform.
One of the challenges, Manfred Glantschnig says, will be to run these devices through a standard C4 production line. „The results we have achieved are very promising.“ Datacon’s objective, he says, is to jump on the trend in high-accuracy/small-pitch that is beginning to materialize and define it at a very early stage as a leading edge technology.
eppe421
Die aktuelle wirtschaftliche Lage bremst zwar die gesamte Elektronikbranche. Doch bietet technologische Weiterentwicklung gerade jetzt wichtige Chancen für die Zukunft. Ein Beispiel ist das Bonding und Packaging von Flip-chips. Hier ist aktuell eine neue Ebene der Genauigkeit in der Erprobungsphase. Das BESI-Tochterunternehmen Datacon, Österreich, zeigt den Stand dieser Entwicklung auf.
La situation économique actuelle entraîne un ralentissement global de la branche électronique. Dans ce contexte justement, le développement technologique offre des chances importantes pour l’avenir. C’est le cas par exemple des technologies du soudage et de l’encapsulation de puces retournées. Dans ce domaine, un nouveau degré de précision est en cours de test. La filiale autrichienne de BESI, Datacon, démontre les progrès réalisés en la matière.
