Jedec and the International Electronics Manufacturing Initiative (iNEMI) have announced the availability of two documents intended to help manufacturers reduce the risk of tin whiskers in lead-free products.
The first is Jedec standard JESD201, “Environmental Acceptance Requirements for Tin Whisker Susceptibility of Tin and Tin Alloy Surface Finishes,” and the second is a Jedec /IPC joint publication, JP002, “Current Tin Whiskers Theory and Mitigation Practices Guideline.”
JESD201 provides a uniform environmental acceptance testing and reporting methodology for tin whisker susceptibility of tin and tin alloy surface finishes used in the electronics industry. It is intended to be used with JESD22-A121, “Test Method for Measuring Whisker Growth on Tin and Tin Alloy Surface Finishes”. JP002 provides guidance in understanding the prevalent theories regarding tin whisker formation, the driving force behind tin whisker growth, and mitigation practices used to minimize whiskers. It serves as a source of background information for JESD22A-121 and JESD201.
“This standard set of testing requirements and associated acceptance criteria are crucial to users, who want to ensure product reliability, as well as to suppliers, who can now proceed with one set of criteria to test and evaluate their finishes rather than trying to meet varying requirements from multiple customers.” said Joe Smetana, principal engineer, advanced technology, for Alcatel and chair of the iNEMI Tin Whisker User Group.
“These joint documents will help the electronics industry move forward to implement reliable and compliant Pb-free products,” said Bruce Euzent of Altera Corporation, chairman of the JC-14.3 Subcommittee on Silicon Device Reliability Qualification and Monitoring. “There was a tremendous amount of cooperative work throughout the worldwide electronics industry to develop these documents.”
JESD201, JP002 and JESD22-A121 can be downloaded from the JEDEC website.
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