The compact JT 2149/MPV Digital I/O Scan (DIOS) module from JTAG Technologies allows digital I/O test access to PCBs requiring external I/O stimulus and response monitoring. The multi-programmable voltage (MPV) DIOS has been designed to slot into JTAG Technologies‘ regular QuadPodT transceiver system as used by the renowned DataBlaster series of boundary-scan/JTAG controller hardware. When connected to a circuit board via edge connector or fixture/jig test pins the module enhances regular interconnect tests by exercising the board’s connections in synchronisation with native boundary-scan components. What’s more, the DIOS module features JTAG’s all new ‚SCIL‘ (Scan Configurable Interface Logic) technology to allow custom functions such as pattern generators, counters and bus simulators to be factory-formatted for more advanced functional and pattern oriented testing. Peter van den Eijnden, JTAG Technologies‘ president, comments: “The JT 2149/MPV DIOS Test Module provides a ‚best-of-both-worlds‘ solution when it comes to implementing boundary-scan and functional tests. For example, a target circuit board (UUT) may contain elements, such as board-edge connectors and non-boundary-scan logic clusters, which cannot be accessed directly by the native boundary-scan devices. In such cases, the overall testability of the board is compromised, allowing some manufacturing faults to go undetected. The new DIOS modules overcome this problem by extending the reach of boundary-scan to include the testing of circuit board edge connectors. Non-boundary-scan logic clusters can also be more easily tested using ’static‘ patterns or at functional speed when utilising the new SCIL option.”
Whilst the module occupies one of the TAP (Test Access Port) locations in the QuadPodT the system still offers four independent TAPs to the target UUT by offering a stream-through option. Hot swapping of targets is supported by the automatic ‚power down between tests‘ feature of QuadPodT. 100 % backward compatibility with other JTAG I/O scan systems is ensured by simulation of the former DIOS-type scan devices. What’s more both output and input thresholds can be programmed to 1.5, 1.8, 2.5 or 3.3 V making them ideally suited to testing of modern low-voltage logic families. The I/O channels are grouped into blocks of 16 channels. To reduce scan chain length and improve test efficiency any number of 16-channel groups can be bypassed. Selected channels can be interfaced with custom cabling to the board under test or interfaced with bed-of-nails fixtures for higher volume production.
EPP Europe 566