IEEE standard 1149.6 is an important extension of the original 1149.1 boundary-scan specification. The extension overcomes test limitations associated with high-speed digital interfaces such as LVDS and ac-coupled networks.
Prior to “dot6“, testing of such networks could produce erroneous pass/fail indications. JTAG ProVision from JTAG Technologies automatically produces an exhaustive test of these types of interfaces, based upon the netlist of the circuit and the BSDLs and model files for the chips in the design.
The test produces a diagnostic fault report which pinpoints the cause of the failure for any of the 30 possible fault types, including multiple faults. The fault report can also be analyzed by JTAG Visualizer, a schematic and layout viewer, and is presented to the engineer as a color-highlighted graphical output.
electronica, booth A1.616
EPP Europe 446
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