Though Europe’s top semiconductor research centers are separated by hundreds of kilometers, they could unite in a vast, distributed network. Such an R&D network could give an enormous boost to research by connecting IC and equipment manufacturing businesses with the continent’s top experts and most advanced tools. In continental Europe, there are three major centers of semiconductor excellence: the Micro Electronics Center (IMEC) in Belgium, LETI (Laboratory of Electronics and Information Technology) in France and the Fraunhofer Society in Germany. All are world-class semiconductor research centers, capable of developing, validating and testing processes and devices. But currently there is no standardized way for them to reliably exchange 300mm complementary metal oxide semiconductor (CMOS) wafers. Now the European IST program-funded Flying Wafer project shows that such a network might be possible.
“For the next 10 years, 300mm CMOS technology will be at the heart of the most interesting semiconductor research,” says Jürgen Frickinger, group leader at the Fraunhofer Institute in Erlangen and manager of the project. By then the industry may move to a 450mm size or develop the next manufacturing technique. In the meantime, 300mm wafers will be the most important substrate. “But right now there’s no standardized methodology for wafer transfer which allows companies to easily access the best tools Europe’s research centers have to offer. It means applied R&D is costly and smaller companies might have to abandon promising research because they don’t know that the tools they need are available in one of the major institutes. Our job was to assess the feasibility of a standardized methodology for wafer exchange in a distributed R&D network with distributed wafer processing so that all of Europe’s technology firms can take advantage of the tools”.
The project served to establish safe procedures for wafer handling and transport, packaging, identification, define requirements for central planning and control system tracking and logistics, flow and rerouting scenarios, data interfaces and security, and optimize contamination control. “Companies need to send wafers of a defined cleanliness to get reliable tests, and to avoid equipment damage at the institutes. Right now, a centre will always demand transport-reference wafers with a wafer shipment to allow further processing of the wafers in its cleanroom. This is time consuming and costly”. Now, the procedures exist on paper and a firm can see the measures required to send wafers safely and cleanly. The team is awaiting further funding to validate the results of the study by real wafer exchange.
EPP EUROPE 405
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