IMEC realized a 5GHz and 15GHz low-power voltage controlled oscillator (VCO) by post-processing high-quality (Q) inductors on top of 90nm RF CMOS devices using a thin-film wafer-level packaging (WLP) technology. These results prove that IMEC’s WLP (wafer-level packaging) technology is a promising solution for the integration of low-power high-performance RF and microwave systems.
As transistor dimensions scale down, and CMOS and SiGe are increasingly replacing GaAs for microwave and millimeter-wave applications, circuit performance becomes increasingly determined by the on-chip passive component quality. However, in the attempt to pace up with this evolution, thinner on-chip metals and dielectrics have a troubling effect on the Q factor of on-chip passives. A cost-effective and attractive solution is to realize inductors using thin-film WLP techniques.
IMEC’s thin-film technology uses alternating layers of BCB (benzo-cyclobutene dielectric) and thick electroplated Cu layers deposited on top of the passivation. The post-processing is compatible with both Cu and Al backend procedures. The technology is cost-effective and consumes no additional Si real estate. Measurements performed on MOS transistors and backend interconnects show no important performance shifts after post-processing. The WLP inductors have increased performance and resonance frequency as compared to back-end versions enabling the design of high-performance low-power circuits such as VCOs.
IMEC applied this technology to realize a 5GHz and 15GHz low-power VCO in 90nm CMOS. The 5GHz and 15GHz VCOs use respectively a 3nH and a 0.6nH WLP inductor without ground shielding resulting in a differential Q factor of 40 and 55, respectively. Applying a polysilicon ground shield can even increase the Q factor. The 5GHz and 15GHz VCOs show a low core-power consumption of respectively 0.33mW and 2.76mW, a phase-noise of –115 and –105dBc/Hz (at 1MHz offset) and a tuning range of 148MHz and 469MHz. For comparison, a 6.3GHz/90nm VCO using a back-end inductor with patterned ground shield has a core-power consumption of 5.9mW with a phase-noise of –118dBc/Hz at 1MHz.
The thin-film technology can be applied both on active wafers (WLP) as on an intermediate glass or high-resistivity Si substrate (thin-film system-in-a-package (SiP) or MCM-D). These results prove that thin-film technology allows integrating high-Q passives in miniaturized system-on-chip (SoC) and SiP for wireless telecommunication applications covering the 1 to 5GHz mobile-phone standards up to 77GHz automotive radar.
EPP EUROPE 439
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